The Cray-2 was a vector supercomputer offered by Cray Research beginning in 1985. It was the fastest machine in the world when it was released, replacing Cray's own X-MP in that spot. The Cray-2 was bumped off of the top spot by the ETA-10G in 1990.

With the successful launch of the famed Cray-1, Cray immediately turned to the design of its successor. By 1979 he had become fed up with constant management interruptions in what was now a large company, and as had he had done in the past, decided to resign his management post and move to form a new lab. As with his original move to Chippewa Falls, Wisconsin from Control Data HQ in Minneapolis, MN, Cray management understood his needs and supported his move to a new lab in Boulder, Colorado. Working as an "independant consultant" he put together a team and started on a completely new design.

Cray had previously attacked the problem of increased speed with three simultaneous advances: more functional units to give the system higher parallelism, tighter packaging to decrease signal delays, and faster components to allow for a higher clock speed. The classic example of this design is the CDC 8600, which packed four CDC 7600-like machines based on ECL-logic into a tiny 1 meter cylinder and ran them at a 8ns cycle speed (125MHz). Unfortunately the incredible density needed to achieve this cycle time led to the machine's downfall; the circuit boards inside were so densely packed that a single malfunctioning transistor would make an entire module fail.

One solution to this problem, one that most computer vendors had already moved to, was to use integrated circuits instead of individual components. Each IC included a selection of components from a module pre-wired into a circuit during the construction process. If an IC didn't work, you simply threw it away and tried another. At the time the 8600 was being designed the simple MOSFET-based technology simply didn't offer the performance Cray needed. Relentless improvements changed things by the mid-1970s, however, and the Cray-1 had been able to use newer IC's and still run at a respectiable 12.5ns (80MHz). In fact the Cray-1 was actually somewhat faster than the 8600 because it packed considerably more logic into the system.

Although IC design continued to improve, the physical size of the IC's was constrained largely by mechanical limits; the resulting component had to be large enough to solder into a system. Dramatic improvements in density were possible, as the rapid improvement in microprocessor design was showing, but for the sorts of IC's used by Cray, ones representing a very small part of a complete circuit, things had pretty much plateaued. In order to gain another 10-fold increase in performance, the goal Cray always aimed for, the machine would have to grow more complex. So once again he turned to a 8600-like solution, doubling the clock speed through increased density, adding more of these smaller processors into the basic system, and then attempting to deal with the problem of getting heat out of the machine.

Cray also felt that silicon technology had almost run its course; improvements on the Cray-1's 12.5ns cycle time were possible, but much more than doubling didn't seem easy. There was, however, the possibility of use gallium arsenide-based (GaAs) circuits instead, which offered at least 10 times the switching speed, and used less power to do it, thereby generating less heat as well. For some time in the late 1970's and early 80's it seemed a wholescale switch to GaAs was just around the corner, and a team from Cray worked with Rockwell International's semiconductor division to try to beat everyone to the punch. However the chips simply weren't ready for production, and the Cray-2 had to press ahead with existing silicon-based designs.

Another design problem was the increasing performance gap between the processor and main memory. In the era of the CDC 6600 memory ran at the same speed as the processor, and the main problem was feeding data into it. Cray solved this by adding ten smaller computers to the system, allowing them to deal with the slower external storage (disks and tapes) and "squirt" data into memory when the main procesor was busy. This solution no longer offered any advantages; memory was large enough that entire data sets could be read into it, but the processors ran so much faster than memory that they would often spend long times waiting for data to arrive. Adding four processors simply made this problem worse.

To avoid this problem the new design included a 128kB block of the very fastest memory possible, attaching the four background processors to it with separate high-speed pipes. This cache was fed data by a dedicated foreground processor who was in turn attached to the main memory through a number of Gb/s channels. It was expected that in normal use the machine would be running a small set of instructions on a large set of data, so the foreground processor could also prefetch instructions from the main memory and feed them into set of eight 16-word (256 byte) buffers, instead of tying up the existing cache pipes to the background processors. Main memory was arranged such that different areas were able to be accessed at the same time, allowing programmers to scatter their data across memory to gain higher parallelism. The downside to this approach is that the cost of setting up the scatter/gather unit was fairly high. For small datasets, or data that didn't lend itself to being spread out evenly, the system would often be slower than a simpler architechture due to high latencies. Modern CPU's use this design as well, although the foreground processor is now referred to as the load/store unit.

Cray-2 models soon settled on a design using large circuit boards absolutely packed with IC's. So packed, in fact, that they were almost impossible to solder together, and yet the density was still not enough to reach their performance goals. Teams worked on the design for about two years before even Cray himself "gave up" and decided it would be best if they simply cancelled the project and fired everyone working on it. Les Davis, Cray's former design collaborator who had remained at Cray headquarters, decided it should be continued at low priority. After some minor personel movements the team continued on much as before.

Six months later Cray "got it". He called the main engineers together for a meeting and presented a new solution to the problem. Instead of making one larger circuit board, each "card" would instead consist of a 3-D stack of eight, connected together in the middle of the boards using pins sticking up from the surface (known as "pogos" or "z-pins"). The cards were packed right on top of each other, so the resulting stack was only about 3 inches high. With this sort of density there was no way any conventional cooling system would work; there was too little room for air to flow between the IC's. Instead the system would be immersed in a tank of a new inert fluid from 3M, fluorinert. As the fluid heated it would rise to the top of the computer chassis where it was pumped to a separate unit that used evaporative cooling to chill the fluid and return it to the chassis. Work on the new design started in earnest in 1982, several years after the original start date.

While this was going on the Cray X-MP was being developed under the direction of Steve Chen at Cray headquarters, and looked like it would give the Cray-2 a serious run for its money. In order to address this internal threat, as well as a series of newer Japanese Cray-1-like machines, the Cray-2 memory system was dramatically improved, both in size as well as the number of "pipes" into the processors. When the machine was eventually delivered in 1985 the delays had been so long that much of its performance benefits were due to the fast memory, and the machine only really made sense to purchase for uses with huge data sets to process. The Cray-2 was predominantly developed for the American Departments of Defense and Energy. Uses tended to be for nuclear weapons research or oceanographic (sonar) development. However, the Cray-2 also found its way into civil agencies (such as NASA Ames Research Center), universities, and corporations worldwide. The Cray X-MP was used in most other roles where processing power was more important than memory, notably in cryptography and similar roles.

The Cray-2 would have been superseded by the Cray-3, but due to development problems; only one system was built and never paid for. The spiritual descendant of the Cray-2 is the Cray X1 , offered by Cray Inc.

External links

Cray-2 (and -3) instruction set notes

Cray-2 module pictures