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Pentium II


The Pentium II is an x86 architecture microprocessor by Intel, introduced on May 7, 1997. It was based on a modifed version of the P6 core first used for the Pentium Pro, but with improved 16-bit performance and the addition of the MMX instructions which had already been introduced on the Pentium MMX.

The original Klamath Pentium IIs ran at 233 and 266 MHz, were produced in a 0.35 µm fabrication process and produced (for that time) an incredible amount of heat. They also worked with a 66 MHz front side bus, which was a speed that was inadequate for the CPU's design to show its full potential. A 300 MHz version was released later in 1997.

The Deschutes core Pentium IIs which debuted at 333 MHz in January 1998 were produced in a more suitable 0.25 µm fabrication process and ran significantly cooler. Support for 100 MHz front side bus speeds heralded decent performance improvements. During 1998, Pentium IIs running at 266, 300, 350, 400, and 450 MHz were also released. Pentium II-based systems also saw the introduction of the new generation RAM-standard, SDRAM (which replaced EDO RAM), and the AGP graphics bus.


Unlike previous Intel processors such as the Pentium and Pentium Pro, the Pentium II was packaged in a slot-based form-factor rather than a socket one. This larger package was a compromise allowing Intel to separate the secondary cache from the processor while still keeping it on a closely coupled bus. This separate cache was slower (running at half the processor speed) than that in the Pentium Pro, but solved the Pentium Pro's low yields allowing Intel to introduce the Pentium II at a mainstream price level.

A low-end version of the Pentium II - essentially a Pentium II with less (or no) level 2 cache - was marketed under the name "Celeron". The Pentium II Xeon was a high-end version intended for use on servers.

By early 1999, the Pentium III superseded the Pentium II.

Modelles

Klamath (350 nm)

  • L1-Cache: 16 + 16 KB (Data + Instructions)
  • L2-Cache: 512 KB, external chips on CPU module with 50% of CPU-speed
  • Slot 1 (GTL+)
  • MMX
  • Front side bus: 66 MHz
  • VCore: 2.8V
  • First release: May 7, 1997
  • Clockrate: 233, 266, 300 MHz

Deschutes (250 nm)

  • L1-Cache: 16 + 16 KB (Data + Instructions)
  • L2-Cache: 512 KB, external chips on CPU module with 50% of CPU-speed
  • Slot 1 (GTL+)
  • MMX
  • Front side bus: 66, 100 MHz
  • VCore: 2.0V
  • First release: January 26, 1998
  • Clockrate: 266 - 450 MHz
    • 66 Mhz FSB : 266, 300, 333 MHz
    • 100 MHz FSB: 350, 400, 450 MHZ


External links

10-26-2009 08:16:03
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