Science Fair Project Encyclopedia
Peripheral Component Interconnect
- For other meanings of PCI, see PCI (disambiguation).
The Peripheral Component Interconnect standard (in practice almost always shortened to PCI) specifies a computer bus for attaching peripheral devices to a computer motherboard. These devices can take the form of:
- integrated circuits fitted on the motherboard itself (called planar devices in the PCI specification); or
- expansion cards that fit in sockets.
The PCI specification covers the physical size of the bus (including wire spacing), electrical characteristics, bus timing and protocols. The specification can be purchased from the PCI Special Interest Group (PCISIG).
Work on PCI began at Intel circa 1990. PCI 1.0, which was merely a component-level specification, released June 22 1992. PCI 2.0, which was the first to establish standards for the connector and motherboard slot, was released on April 30, 1993.
PCI was immediately put to use in high-end servers, replacing MCA and EISA as the server expansion bus of choice. In mainstream PCs, PCI was slower to replace VESA Local Bus (VLB), and did not gain significant market penetration until late 1994 in second-generation Pentium PCs. By 1996 VLB was all but extinct, and manufacturers had adopted PCI even for 486 computers. ISA continued to be used alongside PCI through 2000. Apple Computer adopted PCI for professional Power Macintosh computers (replacing NuBus) in mid-1995, and the consumer Performa product line (replacing LC PDS) in mid-1996.
Later revisions of PCI added new features and performance improvements, including a 66MHz 3.3V standard and 133MHz PCI-X, and the adaption of PCI signalling to other form factors. With the introduction of the serial PCI Express standard in 2004, traditional PCI is likely to slowly die out.
PCI devices are plug and play. The system firmware examines each device's PCI Configuration Space and allocates resources. Each device can request up to six areas of memory space or I/O port space. They can also have an option ROM that can contain executable x86 or PA-RISC code, Open Firmware or an EFI driver.
Interrupts are assigned to the device by firmware rather than being configured by the use of jumpers on the card as was common with ISA devices. While PCI devices are required to have level-triggered interrupts so they can share interrupt numbers, system software will normally try to assign unique interrupts to each device to improve performance.
Conventional PCI bus specifications
- 33.33 MHz clock with synchronous transfers
- peak transfer rate of 133MB per second
- 32-bit or 64-bit bus width
- 32-bit address space (4G bytes)
- 16-bit port space (now deprecated)
- 256 byte configuration space
- 3.3- or 5-volt signalling
- reflected-wave switching
Conventional PCI variants
- PCI 2.2 allows for 66MHz signalling (requires 3.3 volt signalling) (peak transfer 533 MB/s)
- PCI-X changes the protocol slightly and increases the data rate to 133MHz (peak transfer 1066 MB/s)
- PCI-X 2.0 specifies a 266MHz rate (peak transfer 2133 MB/s) and also 533MHz rate, expands the configuration space to 4096 bytes, adds a 16-bit bus variant and allows for 1.5 volt signalling
- Mini PCI is a new form factor for use mainly inside laptops
- Cardbus is a PCMCIA form factor for 32-bit, 33MHz PCI
- Compact PCI, uses Eurocard-sized modules plugged into a PCI backplane.
Other PCI variants
- PCI Express (formerly 3GIO/Arapaho), a serial bus using PCI programming concepts
- Accelerated Graphics Port (AGP)
- Extended Industry Standard Architecture (EISA)
- Industry Standard Architecture (ISA)
- Micro Channel Architecture (MCA)
- VESA Local Bus (VESA)
- XT bus architecture
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