SSE3, also known by its Intel code name Prescott New Instructions or PNI, is the third iteration of the SSE instruction set for the IA-32 architecture. It is a SIMD instruction set.

The earlier SIMD sets on the x86 platform, from oldest to newest, are MMX, 3DNow! (used only by AMD), SSE and SSE2.

Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. AMD will also implement SSE3 in revision E of their Athlon 64 CPUs, due to be released in April 2005.

SSE3 adds about 13 new instructions to its predecessor, SSE2. The most notable addition is the capability to work horizontally in a register, as opposed to the more or less strictly vertical operation of all previous SSE instructions. More specifically, instructions to add and subtract horizontally in a register have been added. These instructions will simplify the implementation of a number of DSP and 3D operations.