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Static Random Access Memory

Static Random Access Memory (SRAM) is a type of semiconductor memory.

The word "static" indicates that the memory retains its contents as long as power remains applied, unlike dynamic RAM (DRAM) that needs to be periodically refreshed. (Nevertheless, SRAM should not be confused with read-only memory and flash memory, since it is volatile memory and preserves data only while power is continuously applied.)

Random access indicates that locations in the memory can be accessed, i.e. written or read, in any order regardless of the memory location that was accessed before.

Each bit in an SRAM is stored on four transistors that form two cross-coupled inverters. This storage cell has two stable states which are used to denote 0 and 1. Two additional access transistors serve to control the access to a storage cell during read and write operations. It thus typically takes six MOSFETs to store one memory bit.

The symmetric circuit structure allows the value of a memory location to be read much faster than in a DRAM. Another difference with DRAM that contributes to making SRAM faster is that commercial chips accept all address bits at a time. As opposed to this, commodity DRAMs have the address multiplexed in two halves, i.e. higher bits followed by lower bits, over the same package pins in order to keep their size and cost down.

SRAM should not be confused with SDRAM, which stands for synchronous DRAM and is entirely different from SRAM, or with pseudostatic RAM (PSRAM), which is DRAM disguised as SRAM.

The size of an SRAM with m address lines and n data lines is 2m words, or 2^m \times n bits.

Contents

Types of SRAM

By Transistor Type

  • bipolar (not much used now: consumes a lot of power but is very fast)
  • CMOS (the most common type)

By Function

  • asynchronous
  • synchronous

Applications

Fast SRAM is faster than DRAM and is used where speed is the most important requirement, as in the cache of a CPU and in digital signal processing circuits. Slow, low-capacity SRAMs are used where low power consumption and low cost are the most important requirements, as in battery-powered backup RAM. SRAM is less dense than DRAM (fewer bits per unit area) and is therefore not suitable for high-capacity, low-cost applications such as PC extended memory.

The power consumption of SRAM varies widely depending on its speed. Fast SRAM is much more power-hungry than DRAM, and some ICs can consume power of the order of a watt at full speed. Slow SRAM, such as the battery-powered "CMOS" RAM on PC motherboards, can have a very low power consumption, in the region of a microwatt.

SRAM for hobbyists

Another current role for SRAM is that it is significantly easier to work with at the hobbyist level than DRAM. There is no need to deal with the refresh cycles of DRAM, and the address and signal pins are separate rather than multiplexed. Therefore the chip has a very straightforward pin-out: power, ground, some address pins, some data pins, and three control pins "write enable", "chip enable" and "output enable". "Chip enable" is for use in systems containing multiple SRAM chips; a demultiplexer, such as a 74LS154, converts some upper bits of the address into a chip-enable for one of sixteen chips.

To write to the chip, the address is presented on the address pins and the desired data on the data pins, then the appropriate chip-enable is set, and then the write-enable. To read from it, the controller first presents the address, then the chip-enable, then the output-enable.

10-26-2009 08:16:03
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