The so-called von Neumann architecture is a model for a computing machine that uses a single storage structure to hold both the set of instructions on how to perform the computation and the data required or generated by the computation. Such machines are also known as stored-program computers. The separation of storage from the processing unit is implicit in this model.

The architecture is named after mathematician John von Neumann who wrote First Draft of a report on the EDVAC, an early written account of a general purpose stored-program computing machine. The term von Neumann architecture, however, is seen as doing injustice to von Neumann's collaborators, notably John William Mauchly and J. Presper Eckert who conceived of the stored-program concept with their work on ENIAC. The term is now avoided in many circles.

By treating the instructions in the same way as the data, a stored-program machine can easily change the instructions. In other words the machine is reprogrammable. One important motivation for such a facility was the need for a program to increment or otherwise modify the address portion of instructions. This became less important when index registers and indirect addressing became customary features of machine architecture.

Current machine architecture makes small-scale self-modifying code unnecessary, while processor pipelining and caching schemes makes it inefficient. The practice is now generally deprecated. Of course, on a large scale, the ability to treat instructions as data is what makes compilers possible. It is also a feature that can be exploited by computer viruses when they add copies of themselves to existing program code. The problem of unauthorized code replication can be addressed by the use of memory protection support, and in particular virtual memory architectures.

The von Neumann bottleneck

The separation between the CPU and memory leads to what is known as the von Neumann bottleneck (a term coined by John Backus in his 1977 ACM Turing award lecture). The bandwidth, or the data transfer rate, between the CPU and memory is very small in comparison with the amount of memory. In modern machines it is also very small in comparison with the rate at which the CPU itself can work. Under some circumstances (when the CPU is required to perform minimal processing on large amounts of data), which are becoming much more frequent as CPU speeds increase and large amounts memory become common, this gives rise to a serious limitation in overall effective processing speed, because the CPU is continuously forced to wait for vital data to be transferred to or from memory. According to Backus:

Surely there must be a less primitive way of making big changes in the store than by pushing vast numbers of words back and forth through the von Neumann bottleneck. Not only is this tube a literal bottleneck for the data traffic of a problem, but, more importantly, it is an intellectual bottleneck that has kept us tied to word-at-a-time thinking instead of encouraging us to think in terms of the larger conceptual units of the task at hand. Thus programming is basically planning and detailing the enormous traffic of words through the von Neumann bottleneck, and much of that traffic concerns not significant data itself, but where to find it.

The cache hierarchy between CPU and main memory addresses some of the performance issues of the bottleneck. It is less clear whether the intellectual bottleneck that Backus criticized has changed much since 1977. Backus's proposed solution has not had a major influence.

On the other hand, modern functional programming and object-oriented programming are much less geared towards pushing vast numbers of words back and forth than, say, Fortran.

See also

• von Neumann machine
• Harvard architecture

External link

• First Draft of a report on the EDVAC (PDF)